This is a Mind Map Of Computer Architecture. Computer architecture is a set of rules and procedures used in computer engineering to explain the functioning, organization, and implementation of computer systems. A system's architecture refers to its structure in terms of the system's individually specified components and their interrelationships. Some definitions of architecture refer to a computer's capabilities and programming paradigm rather than a specific implementation. Computer architecture also includes instruction set architecture design, microarchitecture design, logic design, and implementation, according to some definitions. In EdrawMind community, you can get more templates related to IT or other topics in study, work and life.
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Outline
Computer Architecture
1. Introduction Arch
Function
Data movement
Input data
Output data
Data storage
Data Processing
Control
Structure
I/O Units
Main Memory
CPU
Control unit
ALU
Registers
CPU Interconnection
System interconnection
2. I/O Units
Device
Input
Output
Data transfer
Serial
Parallel
sychronous
Asychronous
Strobe
Source initiates transfer
Destination initiates transfer
Handshaking
Source initiates transfer
Destination initiates transfer
3. CPU
Function
Fetch instructions
Instructions Cycle
Fetch
PC
MAR
Memory
IR
MBR
Execution
Interpret instructions
Execute instructions
fetch data
process data
Write data
Structure
Control unit
ALU
Registers
User-Visible registers
General puropose registers
Data registers
Address registers
Condition code registers
User-invisible registers
Program Counter (PC)
Instruction Register (IR)
Memory Address register (MAR)
Memory Buffer register (MBR)
CPU Interconnection
DATA Flow
Fetch
Exection
Interrupt
4. Interal Memory
CLCS
Location
Internal
Main memory
RAM
ROM
Register
Cache
External
Secondary storage
Disks
Tape
Capacity
bytes
Word
Unit of transfer
bit/sec
Access method
Sequential
Tape
Direct
Disk
Random
RAM
Associative
Cache
Performance
Subtopic
Physical type
Physical CLCs
Organization
Mind Map Of Computer Architecture
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Computer Architecture
1. Introduction Arch
Function
Data movement
Input data
Output data
Data storage
Data Processing
Control
Structure
I/O Units
Main Memory
CPU
Control unit
ALU
Registers
CPU Interconnection
System interconnection
2. I/O Units
Device
Input
Output
Data transfer
Serial
Parallel
sychronous
Asychronous
Strobe
Source initiates transfer
Destination initiates transfer
Handshaking
Source initiates transfer
Destination initiates transfer
3. CPU
Function
Fetch instructions
Instructions Cycle
Fetch
PC
MAR
Memory
IR
MBR
Execution
Interpret instructions
Execute instructions
fetch data
process data
Write data
Structure
Control unit
ALU
Registers
User-Visible registers
General puropose registers
Data registers
Address registers
Condition code registers
User-invisible registers
Program Counter (PC)
Instruction Register (IR)
Memory Address register (MAR)
Memory Buffer register (MBR)
CPU Interconnection
DATA Flow
Fetch
Exection
Interrupt
4. Interal Memory
CLCS
Location
Internal
Main memory
RAM
ROM
Register
Cache
External
Secondary storage
Disks
Tape
Capacity
bytes
Word
Unit of transfer
bit/sec
Access method
Sequential
Tape
Direct
Disk
Random
RAM
Associative
Cache
Performance
Subtopic
Physical type
Physical CLCs
Organization
Mind Map
Outline
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