Unsigned number: the high bits with few digits are filled with 0 and the high bits with more digits are calculated.

Signed numbers: The high-order complement sign bit with a small number of digits is extended to the number operation with a large number of digits.

Includes & | ^ and ~^

The result is only one 1 or 0

For example: y=[4:0]a &a==y[0]&y[1]&y[2]&y[3]&y[4]

unsigned number

signed number

Equality operation

relational operations

logic operation

For example: assign y=s?d0:d1 s input is 1, the result is d0, otherwise it is d1

Y={B[0],2C[1],2b′10} constant bit width cannot be omitted

Copy operation {n{A}}, splice signal A repeatedly n times

logic [7:0] a eight-bit unsigned vector signal

tri [7:0] a eight-bit tri type vector signal

assign #5 out = A&B; //Assign the value to out after a delay of 5 time units. #5 is used for simulation and cannot be synthesized.

assign out=A&B; Once a quantity changes on the right side, the value on the left side is immediately reassigned

The left side can be logic or tri; any input changes will immediately affect the output results.

Blocking assignment out=a&b . The previous statement is not completed and the following statement cannot be executed.

Grammar

branch structure

Loop structure













generate statement

Module to be tested

Module to be tested