MindMap Gallery Basics of digital electronics technology (combinational logic circuits)
"A Concise Tutorial on the Basics of Digital Electronic Technology" by Tsinghua University. Yu Mengchang. The fourth edition (Chapter 4 Combinational Logic Circuits) has a detailed introduction and comprehensive description. I hope it can help interested friends learn.
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This is a mind map about bacteria, and its main contents include: overview, morphology, types, structure, reproduction, distribution, application, and expansion. The summary is comprehensive and meticulous, suitable as review materials.
This is a mind map about plant asexual reproduction, and its main contents include: concept, spore reproduction, vegetative reproduction, tissue culture, and buds. The summary is comprehensive and meticulous, suitable as review materials.
This is a mind map about the reproductive development of animals, and its main contents include: insects, frogs, birds, sexual reproduction, and asexual reproduction. The summary is comprehensive and meticulous, suitable as review materials.
Digital Electronics Technology Basics
Chapter 4 Combinational Logic Circuits
Overview
1 Characteristics of combinational logic functions
Logic function characteristics: The output state of the circuit at any moment only depends on the input state at that moment, and has nothing to do with the original state.
Circuit structure characteristics
①There is no feedback delay circuit between output and input
②Does not contain memory components (flip-flops) and consists only of gate circuits
2. Representation method of logic function of combinational circuit
Truth tables, Karnaugh maps, logical expressions, waveform diagrams, etc., can all be used to represent the logical functions of combinational circuits.
3 Classification of Combinational Circuits
Different logic functions: adder, numerical comparator, encoder, decoder, data selector, data distributor, read-only memory
Different switching components: CMOS, TTL
According to different levels of integration: SSI, MSI, LSI, VLSI
4.1 Basic analysis methods and design methods of combinational circuits
1 Analysis method
step:
2 Design methods
step:
4.2 Adder
Arithmetic operations on binary numbers
Refer to Chapter 1 for base conversion
Half adder: Add two 1-bit binary numbers without considering low-bit carry
Truth table:
Functional form:
National standard symbol:
Full adder: Two addends with the same bit and a carry from the low bit are added together. This addition operation is a full add.
Truth table:
Functional form:
National standard symbol:
Integrated full adder (dual full adder)
TTL:
CMOS:
Adder: A circuit that adds multi-bit binary numbers
Arithmetic formula:
4-bit serial carry adder
Features: The circuit is simple, but the computing speed is not high
Connection Diagram:
carry lookahead adder
Definition: When doing addition, the carry signal of each digit is directly generated by the input binary number.
Features: Fast, but complex circuit
Connection Diagram:
4.3 Encoders and decoders
Coding system: A method of using multiple digits to represent information about different things according to certain rules.
Encoder
Binary encoder:
Three-digit binary encoder (8-wire-3-wire encoder)
Schematic block diagram:
Coding table:
Features:
three-digit binary priority encoder
Coding table:
Features: Priority encoding, which allows several signals to be input at the same time, but only encodes the signal with the highest priority
Integrated 8-wire-3-wire priority encoder
Coding table:
Two 8-line-3-line priority encoders are cascaded into one 16-line-4-line priority encoder Three 8-line-3-line priority encoders are cascaded into one 24-line-5-line priority encoder Four 8-line-3-line priority encoders are cascaded into one 32-line-5-line priority encoder
Binary-decimal encoder: encodes ten signals from 0 to 9 using 4-bit binary codes
8421BCD code encoder (10-4 lines encoder)
Schematic block diagram:
Coding table:
8421BCD code priority encoder
Coding table:
decoder
Binary decoder: a circuit that translates the various states of binary codes into corresponding output signals according to their original meaning.
Features: The output terminal provides all minimum terms
Device examples
Integrated 3-wire to 8-wire decoder:
Device:
Input strobe control terminal:
Truth table:
Binary decoder cascade
Two 3-line to 8-line decoders are connected to form a 4-line to 16-line decoder.
Device:
Three pieces of 3-line to 8-line decoders are connected to form a 5-line to 24-line decoder.
Device:
Truth table:
Integrated 2-wire to 4-wire decoder
Function diagram:
Truth table:
Implementing combinational logic functions using binary decoders
Since the output of the binary decoder can provide all the minterms of the input variables, and any combinational logic function can be transformed into the standard formula of the sum of the minterms, any combinational logic function can be implemented using a binary decoder and a gate circuit
Binary-decimal decoder: a circuit that translates the binary code of decimal numbers, that is, the BCD code, into the corresponding 10 output signals
8421BCD code decoder
Display decoder: Translate the binary codes of numbers, words and symbols into the form that people are accustomed to and display them
digital display
display decoder
4.4 Data selectors and allocators
Data selector: A circuit that selects one output from multiple inputs
Letter representation
D is the data input terminal
A is the address input terminal
For the strobe control terminal
Y is the data output terminal
Integrated 4-to-1 data selector
Device:
Truth table:
Integrated 8-to-1 data selector
Device:
Truth table:
Integrated data selector extension
Data distributor: a circuit that transmits multiple outputs from one input
1-way to 4-way data distributor
Schematic block diagram:
Truth table:
Integrated 1-channel to 8-channel data distributor
Implemented using a 3-wire to 8-wire decoder
Device:
4.5 Parity checker and numerical comparator
Parity checker: Using the logic function of the XOR gate, parity check operations can be performed
If the output is 0, then the number of 1's in the input is an even number. If the output is 1, then the number of 1's in the input is an odd number.
Numeric comparator
In digital circuits, the input of a numerical comparator is the binary number to be compared, and the output is the result of the comparison.
1-bit numerical comparator
Schematic block diagram:
Truth table:
4-bit numerical comparator
Comparison starts from the high bit and proceeds bit by bit until the comparison result is obtained.
Schematic block diagram:
Truth table:
4.6 Implementing combinational logic functions using medium-scale integrated circuits
1 Use data selectors to implement combinational logic functions
step:
1 Select the data selector: determined by n=k-1 (k is the number of variables in the function, n is the number of selector address codes)
2. Write standard AND or expressions of functions
3 Compare and determine the expression of the input quantity
4. Draw a connection diagram
Example:
2 Use binary decoder to implement combinational logic function
step:
1 Select the decoder: 2 variables use a 2-4 line decoder, 3 variables use a 3 line-8 line decoder
2. Write the standard NAND-NAND form of functions
3 Confirm the relationship between variables and inputs
4. Draw a connection diagram
Example:
4.7 Read-only memory
Sort by writing method
Mask ROM
Programmable ROM
Erasable programmable ROM
ROM structure
4.8 Competitive Adventures in Combinational Circuits
Concept: In a combinational circuit, when the input signal changes state, a false signal may appear at the output - the phenomenon of excessive interference with the pulse is called contention risk.
The relationship between competition and risk-taking
Where competition does not necessarily lead to risk taking, where there is risk there must be competition.
Ways to eliminate competitive risk
①Introduction of blocking pulse
②Introduce strobe pulse
③Connect the filter capacitor
④Modify the logic design and add redundant items