Logic circuit diagram:

Logical symbols:

The characteristic table and characteristic equations of the basic flip-flop composed of NAND gates are the same as those of the basic flip-flop composed of NOR gates.

Logic circuit diagram:

Logical symbols:

R is called the set-0 input terminal, which is customarily called the reset terminal.

S is called the set 1 input terminal, which is customarily called the set terminal.

The status is uncertain when the signals of R=S=1 are canceled at the same time.

Simple structure

Has the functions of setting 0, setting 1 and holding

Poor circuit anti-interference ability

There are constraints between R and S, that is, the two inputs cannot be high level at the same time.

During CP=1, if R=S=1, there will be an abnormal situation in which Q and Q are not both 1.

During CP=1, if R and S are canceled in time, set to 0 or set to 1, and the status is determined.

During CP=1, if R and S jump from 1 to 0 at the same time, a race condition will occur and the result will be uncertain.

If R=S=1, CP is suddenly withdrawn, that is, CP jumps from 1 to 0, a race condition will also occur, and the result is uncertain.

Unconstrained problem

During CP=1, the output terminal changes with the input terminal.

When the falling edge of the CP pulse arrives, it is latched, and the stored content is the value of D at the moment of the falling edge.

CP edge (rising or falling edge) trigger

Strong anti-interference ability

Only the function of setting 0 and setting 1

Synchronous input terminal: D is called the synchronous input terminal, because the input signal at D terminal is controlled by the clock CP

Asynchronous input:

COMS edge D flip-flop CC4013

TTL edge D flip-flop 7474

CP edge (rising or falling edge) trigger

Strong anti-interference ability

Complete functions, flexible and convenient to use

CMOS edge JK flip-flop CC4027

TTL edge JK flip-flop 74LS112

JK type flip-flop: Any circuit with the functions of holding, setting 1, setting 0 and flipping is called JK type flip-flop.

D-type flip-flop: Any circuit with the function of setting 1 and setting 0 is called a D-type flip-flop.

T-type flip-flop: Any circuit with hold and flip functions is called T-type flip-flop

T' type flip-flop: Any circuit that flips once every clock pulse is called a T' type flip-flop.

Property table (truth table)

kanotu

Characteristic equation

State diagram

Timing diagram