MindMap Gallery Vehicle-mounted computing platform design
The design of the vehicle computing platform is dismantled and its elements are displayed according to hardware and software. It’s full of useful information, friends in need should quickly collect it!
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Avatar 3 centers on the Sully family, showcasing the internal rift caused by the sacrifice of their eldest son, and their alliance with other tribes on Pandora against the external conflict of the Ashbringers, who adhere to the philosophy of fire and are allied with humans. It explores the grand themes of family, faith, and survival.
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Computing platform
Overview
Platform architecture
Software system
Application layer
Support software layer
operating system layer
Hardware system
Heterogeneous distributed hardware architecture layer
Hardware interface layer
Hardware system solution
Traditional X86-based CPU
SoC (System on Chip) with ARM (Advanced RISC Machine) as the CPU core
ASIC (Application Specific Integrated Circuit) based on specific operations
Co-processing unit
GPU (Graphics Processing Unit)
FPGA (Field-Programmable Gate Array)
DSP (Digital Signal Processor)
Platform hardware system
Heterogeneous distributed architecture
A single board integrates multiple architecture chips
Audi zFAS (MCU, FPGA, CPU)
Single chip integrates multiple architectural units
NVIDIA Xavier (GPU, CPU)
Hardware composition
general computing unit
ARMCortex-A76AE
core
Improved performance for ASIL-B applications
lockstep
Improved safety for ASIL-D applications
AI computing unit
Optional: GPU, FPGA, DSP, ASIC
MobilEye Q4
control unit
Based on traditional automotive MCU
Infineon Aurix TC3xx
communication unit
Sensor data communication
Collect sensor data and perform simple serial-to-parallel conversion of transceiver and transceiver.
GMSL (Gigabit Multimedia Serial Link), Automotive Ethernet
Wireless communication
Used for the car to interact with the cloud and other cars.
4G, 5G, V2X
Control system communication
Used to control the bottom layer of the vehicle
Mainstream solutions for hardware systems
Tesla FSD
FPGA chip
Image signal processor ISP
Image processing unit GPU
Neural Processing Unit NPU
central processing unit CPU
Samsung 14nm FinFET process
An FSD motherboard integrates two FSD chips, which are independent of each other and serve as redundancy.
NVIDIA PX Pegasus Platform
Contains two Xavier units
Xavier
20 TOPS computing power, power consumption 20w
It is a general computing platform
GMSL high speed IO
16nm FinFET process
Built-in processor
ISP (Image Signal Processor)
VPU (Video Processing Unit)
PVA (Programmable Vision Accelerator)
DLA (Deep Learning Accelerator)
CUDA GPU
CPU
Audi zFAS platform
Core components
MobilEye Q3
NVIDIA TK1
Altera Cyclone V
Infineon Aurix TC297T
Software system
Require
Suitable for heterogeneous computing platforms
Able to realize automatic driving system functions
Ensure security, real-time, reliability, and scalability
Subsystem
High performance computing platform
Secure computing platform
software level
operating system layer
real-time operating system
Classified by real-time
hard real time
Soft real-time
Classified by core
microkernel
High stability, relatively low efficiency. Suitable for industrial control and automatic driving.
macro kernel
Board support package
Board Support Package, BSP
It is the intermediary between the operating system and different hardware platforms.
virtual machine monitor
Introduction
Hypervisor, or VMM (Virtual Machine Monitor)
A middle-layer software that runs between the physical server and the operating system.
Running in privileged mode, it is used to isolate and manage multiple virtual machines running on the upper layer, arbitrate their access to the underlying hardware, and virtualize a virtual hardware environment for each guest operating system that is independent of the actual hardware.
Classification
Type 1
Boot directly from the hardware chip. Good performance.
Type 2
Starts after the base operating system (Linux) boots. Good functionality and manageability.
operating system standards
OSEK
Classic AUTOSAR recommended standards
POSIX
Portable Operating System interface of UNIX
Adaptive AUTOSAR recommended standards
Mainstream solution
Vector MICROSAR
Is a set of Classic AUTOSAR solutions
Supports hybrid architecture of secure and non-secure domains
TTTech MotionWise
Supports both Classic and Adaptive AutoSAR
Windriver
is an Adaptive AUTOSAR solution
Real-time operating system: VxWorks
Non-real-time operating system: WRLinux
Support software layer
AUTOSAR
Why?
Design is standardized, modular and easy to integrate
Component configurability
Standardized design for Run Time Environment (RTE)
Have standard test specifications
Classification
Classic AutoSAR
Mainly used for traditional automotive domain controllers.
Deeply couple fixed software functions and computational complexity with hardware computing platforms.
Adaptive AutoSAR
Mainly used in the field of autonomous driving that continues to boast
While ensuring the flexibility of the software architecture, Provide effective communication means and sufficient processing power.
Classic AutoSAR
Application scenarios
Users need to have a deep understanding of the software running on ECUs and MCUs.
Strict constraints are put forward when building the system, such as the calculation time of each task, the number and type of tasks.
level
Layered design
AutoSAR operating environment
Isolates the upper-layer application software (SWC) and the lower-layer basic software
Realizes the abstraction of underlying basic software and network topology (communication relationships between software components)
Rely on the API provided by the lower layer to implement functions.
Application software layer SWC
Calling and communication are performed through the standard interface provided by RTE.
Basic software layer
service layer
Communication Services
Unified encapsulation and communication scheduling for all communication entities
Memory ServicesMemory Services
Encapsulate various types of memory in the controller.
System ServicesSystem Services
Including terminal management, resource management, task management, etc.
ECU abstraction layer
I/O hardware abstraction layer
Encapsulates different I/O device channels and provides a unified interface to the service layer.
Communications Hardware Abstraction Layer
Encapsulate CAN, LIN, MOST and other channels into a unified interface.
Memory hardware abstraction layer
Unified packaging of memory resources on-chip and on-board.
Vehicle hardware abstraction layer
Encapsulate some special peripherals on the ECU, such as watchdogs and clocks.
MCU abstraction layer
I/O driver
Connect analog and digital signals, such as ADC, PWM
Communication driver
Connect to communication chips, such as SPI, CAN, etc.
memory driver
Connect to Flash, EEPROM and external mapping devices
microprocessor driver
Provide a unified interface upwards to ensure that upper-layer software development is decoupled from specific microprocessors.
Complex device driver layer
Used to connect equipment/subsystems with strict real-time requirements
Through the cross-layer design model, real-time guarantee and other mechanisms are deployed in the underlying driver to reduce delays caused by multi-level software calls.
Can be used for watchdog (WatchDog), clock module (Clock Unit), etc.
Adaptive AutoSAR
Application scenarios
Users are unable to put strict constraints on the software system due to various reasons. For example: the rapid increase in the complexity of software and hardware systems and algorithms, the use of multi-core systems, etc.
level
Extend the RTE layer in Classic AutoSAR, Become ARA (AutoSAR Runtime for Adaptive Applications)
Application layer